SFI-5.1 to OTU3/45 Gb/s (2 x 23 Gb/s DQPSK) Multiplexer

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Serializer/deserializer (SerDes) Framer Interface Level 5 (SFI-5.1) to 2 x 23 Gb/s multiplexer for use in 300-pin MSA 40 Gb/s modules for DQPSK applications.
The BCM84142 has an OIF-SFI-5.1-compliant, 16-bit wide receive system data interface with a deskew channel operating from 2.688 Gb/s to 2.85 Gb/s that multiplexes and precodes the data to dual (I & Q) Differential Quadrature Phase Shift Keying (DQPSK) transmitters (operating from 21.25 Gb/s to 22.8 Gb/s). There is an additional deskew lane for the SFI-5.1 interface. The multiplexer and precoders are fully integrated and accept SFI-5.1 data along with a deskew channel copying data sequentially from each data channel. The two-bit data is precoded with a DQPSK precoder. The SFI-5.1 timing clock is generated from the recovered clock. The extracted data can be fed to a PRBS decoder.


  • Data rate support from 21.5 Gb/s to 22.8 Gb/s
  • Differential I and Q channels
  • Programmable preemphasis on I and Q channels
  • Programmable amplitude control
  • Core power supply: 1.0V

Lifecycle Status


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