Serial 10-GbE/Fibre Channel Transceiver with XAUI™ Interface
Fully integrated serialization/deserialization (10.3125-Gb/s/10.5188-Gb/s) interface device that performs the extension functions for a 10-gigabit serial Ethernet reconciliation sublayer (RS) interface.
The XGXS, PCS and PMA functions include 8B/10B coding, 64B/66B coding, SerDes, clock multiplication unit (CMU), and clock and data recovery (CDR). On-chip clock synthesis is performed by high-frequency, low-jitter phase-locked loops for the PMD and XAUI output retimers. Individual PMD and XAUI clock recovery is performed on the device by synchronizing the on-chip VCOs directly to their respective incoming data streams. Elastic buffers are provided to allow the XAUI and PMD interfaces to operate in asynchronous configuration. An external 156.25-MHz/159.38-MHz VCXO is required for clock cleanup mode.
- Serial 10-GbE and Fibre Channel LAN PHY
- Fully integrated CMU, CDR, SerDes, limiting amplifier and EyeOpener®
- Fully integrated serialization/deserialization (10.3125-Gb/s/10.5188-Gb/s) interface device
- XGXS, PCS and PMA functions include 8B/10B coding, 64B/66B coding, SerDes, clock multiplication unit (CMU), and clock and data recovery (CDR)
- Add/Drop Multiplexers
- ATM Switch Backbones
- EDGE and Terabit Routers
- Digital Cross Connects
- Network Interface Cards (NICs)
- Transmission Equipment