BCM8725

Dual 10-Gigabit Ethernet XFI to XAUI™ LAN/WAN Transceiver

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Ethernet/Fibre Channel/SONET LAN/WAN PHY that is a fully integrated dual-channel serialization/deserialization (9.953 Gb/s/10.3125 Gb/s/10.5188 Gb/s) interface device performing the extension functions for a 10 Gb serial Ethernet Reconciliation Sublayer (RS) interface.
 
For WAN applications a WIS-compliant framer with flexible clocking modes allows transmission of Ethernet traffic over a WAN. On-chip clock synthesis is performed by the high-frequency, low-jitter phase-locked loops for the PMD and XAUI™ output retimers. Individual PMD and XAUI clock recovery is performed on the device by synchronizing directly to their respective incoming data streams. Elastic buffers are provided to allow the PMD and XAUI interfaces to operate in asynchronous configuration. Only an external 155.52 MHz/156.25 MHz/159.38 MHz oscillator is required for the reference clock input.

Features

  • Two fully independent channels
  • Pin compatible with the BCM8724
  • Meets or exceeds IEEE 802.3ae
  • Supports XFP/XFI and SFP+ interfaces

Lifecycle Status

Active

Specification Value
Lifecycle Active
Distrib. Inventory No
Samples Available No